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11:40
15 mins
EFFICIENT AND MRI COMPATIBLE VOLTAGE UP-CONVERTER FOR FULLY IMPLANTABLE NEURODEVICES
Chi Wing Wu, Senad Hiseni, Wouter Serdijn
Session: Neurophysiology: Biological Neural Networks
Session starts: Thursday 24 January, 10:40
Presentation starts: 11:40
Room: Lamoraalzaal


Chi Wing Wu (Delft University of Technology)
Senad Hiseni (Delft University of Technology)
Wouter Serdijn (Delft University of Technology)


Abstract:
In medicine, there is a growing awareness that drugs cannot cure everyone and often produce harmful side-effects. Advances in technology, together with favorable results from actual monitoring, treatment and clinical trials, have led more physicians to recognize the potential clinical value of neurodevices. Neurodevices are implanted inside the body by a neurosurgeon and used to deliver electrical stimulation safely and in a controlled (albeit primitive) way for the clinical treatment of a great variety of nervous system diseases [1]. In order to stimulate the tissue effectively, voltages up to 20 V may be required. For such voltages, battery technology itself cannot provide power efficient implantable solutions. Therefore, a fully implantable, compact and efficient voltage up-converter is required. Moreover, the converter should be compatible with other medical devices like MRI scanners. Two main principles can be distinguished to implement voltage up-converters. Both types make use of the fundamental properties of reactive components, by switching them on and off to generate a high voltage. The first one is inductor based, and the second one is capacitor based. Advantage of the capacitor based type is that it is relatively easier to make it MRI compatible. The proposed voltage up-converter is realized by utilizing a charge pump technique. To increase the energy efficiency of the conversion, the output voltage of the converter can be modified by enabling and disabling consecutive stages of the converter. Using a Cockcroft-Walton [2] inspired charge pump structure, voltage drops across the switching transistors are kept minimal. The result is that transistors with low break-down voltage can be used, keeping chip area and breakdown risk minimal. The high density on-chip capacitors of the various stages are optimally distributed, in such a way that the startup and recovery time are optimized and the number of external components is kept minimal. To verify its performance, a voltage up-converter using the proposed techniques is designed to be implemented in 0.18 μm CMOS AMS technology. The design is verified by means of simulations in Cadence using RF Spectre. The simulations showed that the worst case circuit recovery time is 9 ms. The efficiency of the up-converter is 75 % and the voltage ripple remains below 10 % of the maximal output voltage.